Updated CASES98 CFP

Lei Liu <lliu@yoshiko.capsl.udel.edu>
31 Aug 1998 12:44:43 -0400

          From comp.compilers

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Updated CASES98 CFP lliu@yoshiko.capsl.udel.edu (Lei Liu) (1998-08-31)
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From: Lei Liu <lliu@yoshiko.capsl.udel.edu>
Newsgroups: comp.compilers
Date: 31 Aug 1998 12:44:43 -0400
Organization: University of Delaware EE/CIS Lab
References: 98-08-147 98-08-150 98-08-155
Keywords: conference, parallel

                  NEW DATE FOR CASES98 WORKSHOP: December 4-5 1998.

      To avoid conflicts with other meetings and help with travel planning
      the CASES98 Workshop has been rescheduled. The revised CFP is attached


                                              Call for Participation

                            Compiler and Architecture Support for
                                Embedded Computing Systems (CASES98)

                                          An International Workshop
                                                December 4-5, 1998
                                                    Washington D.C.

          Over the past decade, substantial research has gone into the design of
microprocessors embodying parallelism at the instruction-level, as well as
aggressive compiler optimization and analysis techniques for harnessing this
opportunity. Much of this effort has since been validated through the
proliferation of "product quality" general purpose computers based on these
technologies. Growing demand for high performance in embedded computing
systems is creating new opportunities to leverage instruction-level
parallelism (ILP) or Explicitly Parallel Instruction Computing (EPIC)
technology including application-specific domains. Embedded computers are
increasingly present in day to day settings. Examples where ILP may address
the need for high performance and application specific embedded computing
include set-top boxes, hand-held games, mobile and web appliances, and
advanced automotive systems.

          However, several novel challenges have to be overcome in order to
harness the opportunities offered by EPIC style architectures in the
context of embedded systems. Constraints on the code size, weight and power
consumption place stringent requirements on the processors and the software
they execute. Also constraints rooted in real-time requirements are often a
significant consideration in many embedded systems. Furthermore, the cost is
a severe constraint on embedded processors. In this regard, the needs of
embedded computing differ from those of more traditional general purpose systems.


                                                            INVITED SPEAKERS

                                            Josh Fisher, Hewlett-Packard Labs,

                                                          Other Speaker(s) TBA


                                                About this Workshop

          This workshop is an informal forum for researchers to discuss their ideas centered
on emerging technology themes with emphasis on the synergy between processors
that embody instruction level parallelism, and high performance embedded
systems. Thus, enabling high-performance embedded technologies using ILP will
be a significant, albeit not an exclusive goal. Technical as well as position
papers espousing significant novel ideas and technical results are solicited.

          Suggested topics include (but are not limited to) the following:

          * Application specific design and synthesis.
          * Research challenges and solutions in microarchitecture design for
              embedded systems based on ILP.
          * Research directions in embedded system software tools, with emphasis
              on light-weight languages for temporal specification. Optimizing
              compilers for ILP exploitation in the presence of temporal constraints.
          * Harnessing the interaction between the hardware and software layers,
              spurred by innovations in reconfigurable or adaptive computing systems.
          * Characterizing the need of research infrastructure development for
              embedded systems based on ILP and adaptive technologies.
          * Synergy between extant parallel computing technologies, such as
              notations for expressing concurrency, and instruction level parallel
              processing, with emphasis on concerns of embedded computing.
          * Compiler Controlled Memory Hierarchy Management and Smart Caches.

          Presentation of ongoing work is encouraged. No formal proceedings are
planned; therefore the results presented in the workshop can be published in
archival journals. However, there is a plan to invite high quality papers
presented at the workshop as candidates for a special monograph based
on the workshop's theme.

          In addition to the presentations, the workshop will have

          * A panel constituted of experts from industry, government and academic
              research organizations to discuss the topic:

              Software Tools for Embedded Computing: Needs, Solutions and Directions.

          TO PARTICIPATE, please submit either one copy of an extended abstract not
exceeding FIVE pages to the following email address or FIVE hard copies to the
program chair at the following address specified. Authors will be notified of a final
decision by November 1st, 1998.

          Submission deadline: October 1st, 1998.

          E-mail address for submission: CASES98@capsl.udel.edu

          Mail address for submission:

                                  Krishna V. Palem
                                  Courant Institute of Mathematical Sciences
                                  251 Mercer Street
                                  New York, NY 10012,


          Program Co-chairs:

                                  Guang R. Gao (Univ. of Delaware)
                                  Krishna V. Palem (NYU)

          Local Arrangement Chair:

                                  B. Narahari (The George Washington University)

          Workshop Committee:

                                  J. Bondi (TI),
                                  K. Ebcioglu (IBM T. J. Watson Research Center),
                                  Guang R. Gao (U. of Delaware),
                                  Lal George (Lucent Technologies),
                                  Rajiv Gupta (U. of Pittsburgh),
                                  Richard Johnson (Transmeta Corporation),
                                  Oded Maler (Grenoble),
                                  Miroslaw Malek (Humboldt University),
                                  Krishna Palem (NYU),
                                  Bill Mangione-Smith (UCLA),
                                  John Thornley (Caltech),
                                  Wei Zhao (Rockwell Semiconductor Systems)

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