Visualizing register spills and multi-threaded ops.

Hello,


I would like to avoid re-inventing the wheel, so I was wondering if anyone
had any advice or pointers which might be of use.


I am considering building a TK program to visualize the impact of
optimization on spills, register usage, and operation threads.


The intended use is for presentation and qualitative analysis of machine
language traces for DSPs but could be applicable to most architectures.


Thank-you!


Brent
[If not already done, it'd be a cool master's thesis. -John]
--

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