|Dataflow Analysis of Scalar Vars firstname.lastname@example.org (1998-01-17)
|email@example.com (Sezer Goren)
|17 Jan 1998 00:05:06 -0500
|UC Santa Cruz CIS/CE
Dear Compiler People:
My specialty is behavioral synthesis which is nothing but hardware
compilation from an HDL specification such as Verilog. I have
developed a state-of-the-art tool for that.
In doing that, I believe I devised a very useful algorithm for
dataflow analysis of scalar variables. The algorithm is of quadratic
complexity even for non-reducible flow graphs. According to the DRAGON
book, the worst case complexity of known algorithms for non-reducible
flow graphs is exponential. I am not sure if I made a breakthrough, or
am not aware of the new research on the subject, or am making a
mistake in my algorithm. If I am making a mistake, it should not be a
trivial one as my algorithm is used in hundreds of Verilog designs and
always compiles correct hardware, and also it is very solid in terms
of its graph theoretical basis.
I would like to publish my research. Since I am not a compiler
reasearcher, I would like to team up with a compiler expert and
publish a joint paper.
I have contacted a well-known prof at Stanford but I don't think I
will get enough attention if any. I am looking for interested
researchers or maybe you could point me to the right person.
PS: I am posting this from my fiancee's account since we have a
firewall at work. Please reply me at firstname.lastname@example.org.
A short bio:
I got my PhD from CWRU in Jan 95. I joined General Motors Research in
March 93 before I finished my PhD. I worked on behavioral synthesis
there until Aug 97 when I joined Lucent Microelectronics in Silicon
Valley as an ASIC design consultant.
Lucent Technologies, Santa Clara, CA
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