ICS'97 -- Early Registration Deadline Approaching

wender@dolly.par.univie.ac.at (Bernd Wender)
4 Jun 1997 22:54:20 -0400

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ICS'97 -- Early Registration Deadline Approaching wender@dolly.par.univie.ac.at (1997-06-04)
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From: wender@dolly.par.univie.ac.at (Bernd Wender)
Newsgroups: comp.compilers,comp.sys.super
Date: 4 Jun 1997 22:54:20 -0400
Organization: Institute for Software Technology and Parallel Systems
Distribution: inet
Keywords: conference

Please find enclosed the Advance Program for the 11th ACM International
Conference on Supercomputing. Please keep in mind that the early
registration deadline is *** June 9, 1997 ***.
The following information (and a lot more - including the registration form)
can be found at our ICS'97 WWW home page at


Bernd Wender -- Publicity Chair ICS'97 (wender@par.univie.ac.at)


Invitation to ICS'97 in Vienna, Austria

The ACM International Conference on Supercomputing is a forum for engineers
and scientists throughout the world to exchange ideas and research results
relating to high performance supercomputing systems. The 11th conference in
the series will be held in Vienna, Austria, from July 7th through July 11th,
1997. Vienna is the site of one of the oldest universities in the world,
which was the home of the Vienna Circle and Kurt Gödel and, in recent
years, became a European Center for high performance parallel computing.

The conference program includes

      * five keynote addresses by top-level researchers,
      * 43 contributed papers,
      * four workshops, all of which will take place on July 7th,
      * two panel sessions,
      * an exhibit, and
      * an industrial session.

The social events include a reception by the Mayor of the City of Vienna, a
formal Conference Dinner at an 18th-century Palais, and an informal evening
at a typical Viennese wine restaurant.

I would like to take this opportunity to express my appreciation for the
many individuals and institutions who contributed to this conference.
Special thanks are due to the Program Chair, Steve Wallach, the Vice Program
Chairs, Harry Wijshoff, Nikolay Mirenkov and Jim Smith, the other members of
the Conference Committee, and the Program Committee.

This Advance Program describes the conference in detail. Additional
up-to-date information can be found at the ICS'97 World Wide Web page at

I cordially invite you to join us and participate in ICS'97!

Hans Zima -- General Chair

Conference Committee

General Chair: Hans Zima, University of Vienna

Program Chair: Steve Wallach, HP Convex
Vice Program Chair - Applications: Harry Wijshoff, Leiden University
Vice Program Chair - Software: Nikolay Mirenkov, University of Aizu
Vice Program Chair - Architecture: Jim Smith, University of Wisconsin

Finance Chair: Günther Vinek, University of Vienna
Local Arrangements Chair: Gerald Quirchmayr, University of Vienna
Workshop Chair: Frank Baetke, Hewlett-Packard
Exhibition Chair: Erich Schikuta, University of Vienna
Publicity Chair: Bernd Wender, University of Vienna

Program Committee

Makoto Amamiya - Kyushu University, Japan
Nawaf Bitar - Silicon Graphics Corp., Mountain View, CA, USA
Francois Bodin - IRISA/INRIA, Rennes, France
Tom Conte - North Carolina State University, Raleigh, NC, USA
George Cybenko - Dartmouth College, Hanover, NH, USA
Thomas Fahringer - University of Vienna, Austria
Susan Flynn-Hummel - Polytechnic University of New York, NY, USA
Ian Foster - Argonne National Lab., IL, USA
Kyle Gallivan - Computer Systems and Research Lab, Urbana, IL, USA
Stratis Gallopoulos - University of Patras, Greece
Dennis Gannon - Indiana University, Bloomington, IN, USA
Hans Michael Gerndt - KFA Jülich, Germany
Elana Granston - Hewlett-Packard, Cupertino, CA, USA
Bill Harrod - Cray Research, Eagan, MN, USA
Elias Houstis - Purdue University, West Lafayette, IN, USA
Hironori Kasahara - Waseda University, Japan
Joe Kazuki - Nara Institute of Science and Technology, Japan
David Lilja - University of Minnesota, Minneapolis, MN, USA
Kathryn McKinley - University of Massachusetts, USA
Piyush Mehrotra - ICASE, NASA Langley Research Center, Hampton, VA, USA
John Mellor-Crummey - Rice University, Houston, TX, USA
Alex Nicolau - University of California, Irvine, CA, USA
Yoshio Oyanagi - University of Tokyo, Japan
Yousef Saad - University of Minnesota, Minneapolis, MN, USA
Joel Saltz - University of Maryland, College Park, MD, USA
David Schneider - Cornell University, Ithaca, NY, USA
Steve Scott - Cray Research, Inc., Chippewa Falls, WI, USA
J.P. Singh - Princeton University, Princeton, NJ, USA
Henk Sips - Delft University of Technology, The Netherlands
Guri Sohi - University of Wisconsin-Madison, WI, USA
Clemens August Thole - GMD, Sankt Augustin, Germany
Josep Torrellas - Univ. of Illinois at Urbana Champaign, IL, USA
Mateo Valero - Univ. Politecnica de Catalunya, Barcelona, Spain
Stamatis Vassiliadis - Delft University of Technology, The Netherlands
Alex Veidenbaum - University of Illinois, Chicago, IL, USA
Shlomo Weiss - Tel Aviv University, Israel
Lex Wolters - Leiden University, The Netherlands
Pen-Chung Yew - University of Minnesota, Minneapolis, MN, USA

Workshop Program

                                                              Monday, July 7
                                  Performance Data Mining: Automated Diagnosis, Adaption, And
  9:00 - 18:00 Chairs: Alois Ferscha and Allen D. Malony
                                  Univ. of Vienna, Austria; University of Oregon, Portland,
                                                                                  OR, USA

                                  Molecular Bioinformatics: Sequence Analysis -- The Human
                                                                            Genome Project
  13:30 - 17:15 Chairs: Ralf Hofestaedt and Hwa Lim
                                  Univ. of Magdeburg, Germany; Pangea Systems Inc., Oakland,
                                                                                  CA, USA

                                  Metacomputing: The Challenge of High Performance Distributed
  9:00 - 12:30 Systems
                                                                      Chair: Dennis Gannon
                                                  Indiana University, Bloomington, IN, USA

                                                        High Performance Cluster Computing
  13:30 - 17:15 Chair: Alok Choudhary
                                                    Northwestern Univ., Evanston, IL, USA

Conference Program
                                                              Tuesday, July 8
                                                      Opening: 9:00 -- 9:30

                                                  Invited Talk: 9:30 - 10:30
            The Characteristics of the Uniprocessor in Future Supercomputers

                                    Yale N. Patt, Univ. of Michigan, MI, USA
                                                Coffee Break: 10:30 - 11:00

            Session 1a: 11:00 - 12:00
    Instruction-Level Parallelism and Session 1b: 11:00 - 12:00
                        Wide-Busses Collective I/O

  Scalable Instruction-Level
  Parallelism Implementation of Collective I/O in
  Through Tree Instructions the Intel Paragon Parallel File
  Jaime H. Moreno and Mayan Moudgill System: Initial Experiences
  IBM T. J. Watson Research Center, Rajesh Bordawekar
  York California Institute of Technology,
  town Heights, NY, USA Pasadena, CA, USA

                                                                          Optimizing Collective I/O Performance
  Increasing Memory Bandwidth With on Parallel Computers: A Multisystem
  Wide Buses: Compiler, Hardware and Study
  Performance Trade-Offs Ying Chen*, Ian Foster, Jarek
  David Lopez, Mateo Valero, Josep Nieplocha, and Marianne Winslett*
  Llosa, and Eduard Ayguade *Univ. of Illinois, Urbana, IL, USA;
  Univ. Politecnica de Catalunya, Pacific Northwest National Lab.,
  Barcelona, Spain Richland, WA, USA; Argonne National
                                                                          Lab., Argonne, IL, USA

                                                  Lunch Break: 12:00 - 14:00

            Session 2a: 14:00 - 15:30 Session 2b: 14:00 - 15:30
                        Applications Caches

  Performance Improvement Through Data Caches for Superscalar Processors
  Overhead Analysis: A Case Study in Toni Juan, Juan J. Navarro, Olivier
  Molecular Dynamics Temam*
  Graham D. Riley, J. Mark Bull, and Univ. Politecnica de Catalunya,
  John R. Gurd Barcelona, Spain; *Versailles Univ.,
  University of Manchester, UK France

  Generalized Cannon's Algorithm for
  Parallel Matrix Multiplication Improving Data Cache Performance by
  Hyuk-Jae Lee, James P. Robertson, Pre-Executing Instructions Under a
  and Jose A.B. Fortes Cache Miss
  Louisiana Tech. Univ., Ruston, LA, James Dundas and Trevor Mudge
  USA Univ. of Michigan, Ann Arbor, MI, USA

  A High-Order Direct Solver for Eliminating Cache Conflict Misses
  Helmholtz Equations With Neumann Through XOR-Based Placement Functions
  Boundary Conditions Antonio Gonzalez, Mateo Valero, Nigel
  Xian-He Sun and Yu Zhuang Topham* and Joan M. Parcerisa
  Louisiana State University, Baton Univ. Politecnica de Catalunya,
  Rouge, LA, USA Barcelona, Spain; *Univ. of Edinburgh,

                                                Coffee Break: 15:30 - 16:00

                                                Panel Session: 16:00 - 18:00
              Debate: On The Relative Merits Of Parallel Programming Using a
  Single-Address-Space Model Versus Message-Passing Between Multiple Address
                                  Chair: John Gurd, Univ. of Manchester, UK

                                      Reception - City of Vienna (City Hall)

                                                            Wednesday, July 9

                                                    Invited Talk: 8:30 - 9:30
                                Title: Computers in the Drug Discovery Cycle
                              Hwa Lim, Pangea Systems Inc., Oakland, CA, USA

          Session 3a: 9:30 - 10:30
          Scheduling and Processor Session 3b: 9:30 - 10:30
                      Assignment Parallel Architectures

  Performance Study on Optimal
  Processor Assignment in Parallel pSNOW: A Tool to Evaluate Architectural
  Relational Databases Issues for NOW Environments
  Kevin H. Liu Mangesh Kasbekar, Shailabh Nagar, Anand
  Victoria University of Sivasubramaniam
  Technology, Melbourne, Australia Pennsylvania State Univ., PA, USA

  Multiprocessor Scheduling with
  Client Resources to Improve the CP-PACS: A Massively Parallel Processor
  Response Time of WWW For Large Scale Scientific Calculations
  Applications T. Boku, K. Itakura, H. Nakamura and K.
  Daniel Andresen and Tao Yang Nakazawa
  University of California, Santa Univ. of Tsukuba, Japan
  Barbara, CA, USA

                                                Coffee Break: 10:30 - 11:00

        Session 4a: 11:00 - 12:00 Session 4b: 11:00 - 12:00
      Object-Oriented Programming Routing

  A Methodology for Specifying
  Data Distribution Using Only
  Standard Object-Oriented Impact of Selection Functions on Routing
  Features Algorithm Performance in Multicomputer
  Naohito Sato, Satoshi Matsuoka, Networks
  Jean-Marc Jezequel, Akinori Wu-chang Feng, Kang G. Shin
  Yonezawa Univ. of Michigan, Ann Arbor, MI, USA
  Univ. of Tokyo, Japan

  HPC++: Experiments with the
  Parallel Standard Template
  Library Performance Benefits of Virtual Channels
  Elizabeth Johnson, Dennis And Adaptive Routing: An
  Gannon, and Peter Beckman* Application-Driven Study
  Indiana Univ., Bloomington, IN, Aniruddba S. Vaidya, Anand
  USA; Sivasubramaniam, and Chita R. Das
  *Los Alamos National Lab., NM, Pennsylvania State Univ., PA, USA

                                                  Lunch Break: 12:00 - 14:00

        Session 5a: 14:00 - 15:30 Session 5b: 14:00 - 15:30
                  Synchronization Performance

                                                                    Performance Evaluation of Message-Driven
  Distributed Shared Memory Parallel VLSI CAD Applications on General
  Systems with Improved Barrier Purpose Multiprocessors
  Synchronization And Data John G. Holm, John A. Chandy*, Steven
  Transfer Parkes*, Sumit Roy, Venkatram
  Nian-Feng Tzeng and Angkul Krishnaswamy, Gagan Hasteer, and
  Kongmunvattana Prithviraj Banerjee**
  Univ. of Southwestern Louisiana, University of Illinois, Urbana, IL, USA;
  Lafayette, LA, USA *Sierra Vista Research, Los Gatos, CA,
                                                                    USA; **Northwestern University, Evanston,
                                                                    IL, USA

                                                                    Incorporating Application Dependent
  A Graph Based Approach to Information In An Automatic Code
  Barrier Synchronisation Generating Environment
  Minimisation R. van Engelen, I. Heitlager, L. Wolters,
  E.A. Stöhr and Michael F. P. and G. Cats*
  O'Boyle Leiden University, The Netherlands;
  Univ. of Manchester, UK *Royal Netherlands Meteorological
                                                                    Institute, Ae de Bilt, The Netherlands

  The Importance of
  Synchronization Structure in Sparse Code Generation for Imperfectly
  Parallel Program Optimization Nested Loops With Dependencies
  Arjan J.C. van Gemund Vladimir Kotylar and Keshav Pingali
  Delft Univ. of Technology, The Cornell University, Ithaca, NY, USA

                                                Coffee Break: 15:30 - 16:00

                                                Panel Session: 16:00 - 18:00
        Debate: On The Implementation Aspects of a Single-Address-Space Model
  Versus a Message-Passing Model As Seen From Independent Software Providers
                      Chair: Frank Baetke, Hewlett Packard, Munich, Germany

                              Conference Dinner (Palais Pallavicini): 20:00

                                                            Thursday, July 10

                                                    Invited Talk: 8:30 - 9:30
      Problem Solving Environments and Netsolve: A Network Server for Solving
                                              Computational Science Problems
                      Jack Dongarra, Univ. of Tennessee, Knoxville, TN, USA

              Session 6a: 9:30 - 10:30 Session 6b: 9:30 - 10:30
                          Prefetching Communication and Multicasts

  Speculative Execution Via Address Performance Considerations in Software
  Prediction and Data Prefetching Multicasts
  Jose Gonzalez and Antonio Gonzalez Joerg Cordsen, H.-W. Pohl, and Wolfgang
  Univ. Politecnica de Catalunya, Schröder-Preikschat*
  Barcelona, Spain GMD-First Berlin, Germany; *Univ. of
                                                                          Potsdam, Germany

  Adaptive Data Prefetching Using Iteration Space Slicing And Its
  Cache Information Application To Communication
  Ando Ki, Alan Knowles Optimization
  Univ. of Manchester, UK William Pugh and Evan Rosser
                                                                          Univ. of Maryland, MD, USA

                                                Coffee Break: 10:30 - 11:00

            Session 7a: 11:00 - 12:00
        Tree-based and Semi-Structured Session 7b: 11:00 - 12:00
                        Applications Distributed Shared Memory

  Compiler And Run-Time Support For Design and Performance of the Shasta
  Semi-Structured Applications Distributed Shared Memory Protocol
  Nikos Chrisochoides, Induprakas Daniel J. Scales and Kourosh
  Kodukula, and Keshav Pingali Gharachorloo
  Cornell University, Ithaca, NY, USA Digital Western Research. Lab., Palo
                                                                          Alto, CA, USA

  Conflict-Free Template Access in An I/O Network Architecture of the
  k-ary and Binomial Trees Distributed Shared-Memory Massively
  Sajal K. Das, Falguni Sarkar, and
  M.Christina Pinotti* Parallel Computer JUMP-1
  University of North Texas, Denton, H. Nakajo, S. Ohtani, T. Matsumoto, M.
  TX, USA; *IEI, Consiglio Nazionale Kohata, K. Hiraki and Y. Kaneda
  delle Ricerche, Pisa, Italy Kobe Univ., Japan

                                                  Lunch Break: 12:00 - 14:00

            Session 8a: 14:00 - 15:30 Session 8b: 14:00 - 15:30
                            Compilers Hardware Features for Performance

  Symbolic Evaluation for
  Parallelizing Compilers Implementation and Analysis of Path
  Thomas Fahringer and Bernhard History in Dynamic Branch Prediction
  Scholz Schemes
  Univ. of Vienna, Austria; Vienna Shlomo Reches, Shlomo Weiss
  Univ. of Technology, Austria Tel Aviv Univ., Israel

  A Compiler Algorithm for Optimizing
  Locality in Loop Nests
  Mahmut T. Kandemir, J. Ramanujam, A Victim Cache for Vector Registers
  and Alok Choudhary Roger Espasa, Mateo Valero
  Syracuse Univ., NY, USA; Louisiana Univ. Politecnica de Catalunya,
  State Univ., Baton Rouge, LA, USA; Barcelona, Spain
  Northwestern Univ., Evanston, IL,

                                                                          The Performance Impact of Exploiting
  Compile-Time Minimisation of Load Branch ILP with Tree Representation of
  Imbalance in Loop Nests ILP Code
  Rizos Sakellariou and John R. Gurd Soo-Mook Moon, Kemal Ebcioglu
  Univ. of Manchester, UK Seoul Nat. Univ., South Korea; IBM T.
                                                                          J. Watson Research Center, Yorktown
                                                                          Heights, NY, USA

                                                Coffee Break: 15:30 - 16:00

                                          Industrial Session: 16:00 - 18:00
                                Sightseeing Tour and Heurigen Dinner: 19:00

                                                              Friday, July 11

                                                    Invited Talk: 8:30 - 9:30
                                            The Road to a Petaflops Computer
              Paul Smith, Department of Energy, Washington, DC, USA (Speaker)
              Martin Sokoloski, Science and Technology Corp., Hampton, VA, USA

                                                  Invited Talk: 9:30 - 10:30
            SPOCK: Rapid Product Development via Computer-Based Communication
      Stefan Rill, Daimler Benz Aerospace Airbus / Univ. of Bremen, Germany

                                                Coffee Break: 10:30 - 11:00

          Session 9a: 11:00 - 12:30
  Data Placement and Transformation Session 9b: 11:00 - 12:00
                                                                            Performance Prediction and Coding

  Non-singular data
  transformations: Definition, Developing Architecture Adaptive
  Validity and Applications Algorithms using Simulation with
  Michael F.P. O'Boyle and P.M.W MISS-PVM for Performance Prediction
  Knijnenburg Dieter F. Kvasnicka and Christoph W.
  Univ. of Manchester, UK; Leiden Ueberhuber
  Univ., The Netherlands Vienna Univ. of Technology, Austria

  Cache Miss Equations: An Optimizing Matrix Multiply using PHiPAC:
  Analytical Representation of a Portable, High-Performance, ANSI C
  Cache Misses Coding Methodology
  Somnath Ghosh, Margaret Jeff Bilmes, Krste Asanovic, Chee-Whye
  Martonosi, and Sharad Malik Chin, and Jim Demmel
  Princeton Univ., NJ, USA Univ. of California at Berkeley, CA, USA

  Adaptive Migratory Scheme for
  Distributed Shared Memory
  Jai-Hoon Kim, Nitin H. Vaidya
  Texas A&M Univ., College Station,

                                                    End of Conference: 12:30

<a href="http://www.par.univie.ac.at/~wender/wender.cgi">Bernd Wender</a>,
Univ. of Vienna, Institute for Software Technology and Parallel Systems.

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