Related articles |
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Re: Using memory above TOS bart@time.cirl.uoregon.edu (1996-05-19) |
Re: Using memory above TOS jeremy@floyd.sw.oz.au (1996-05-21) |
SPARC register windows (was: Re: Using memory above TOS) Peter.Damron@Eng.Sun.COM (1996-05-24) |
From: | Peter.Damron@Eng.Sun.COM (Peter C. Damron) |
Newsgroups: | comp.compilers |
Date: | 24 May 1996 15:42:57 -0400 |
Organization: | Sun |
References: | 96-05-132 96-05-142 |
Summary: | register windows are not a stack cache |
Keywords: | architecture |
jeremy@floyd.sw.oz.au (Jeremy Fitzhardinge) writes:
...
>Trying to use memory below the stack on a SPARC completely
>fails, because the stack is generally not used directly, but
>kept cached in register windows. The kernel takes the liberty
>of not saving register windows "below" the SP on context
>switches. In other words, you can't really defer the
>use of a "save" instruction if you need to store things
>on the stack.
...
Using memory below the stack pointer does fail on SPARC running
Solaris/SunOS. But that is because signals (or something else in the OS?)
may write over that memory.
The stack on SPARC/Solaris is not "cached in register windows". The
register windows and stack frames may be pushed and popped independently,
though they are usually kept in sync. There is a fixed area per stack frame
for saving part of the register window to allow for register window overflow
(spill) and subsequent underflow (refill).
Just to clarify things,
Peter.
----------------------------
Peter C. Damron, (not speaking for) SunSoft, a Sun Microsystems, Inc. Business
SPARCompilers, UMPK 16-303, 2550 Garcia Ave. Mtn. View, CA 94043
peter.damron@eng.sun.com
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