Re: performance measurement and caches

Terje Mathisen <Terje.Mathisen@hda.hydro.com>
16 Feb 1996 01:26:39 -0500

          From comp.compilers

Related articles
performance measurement and caches boehm@parc.xerox.com (1996-02-14)
Re: performance measurement and caches Terje.Mathisen@hda.hydro.com (Terje Mathisen) (1996-02-16)
Re: performance measurement and caches chase@centerline.com (1996-02-16)
Re: performance measurement and caches romer@cs.washington.edu (1996-02-16)
Re: performance measurement and caches jgj@ssd.hcsc.com (1996-02-16)
Re: performance measurement and caches alms@pesqueira.di.ufpe.br (1996-02-16)
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Re: performance measurement and caches grunwald@foobar.cs.colorado.edu (1996-02-17)
[3 later articles]
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From: Terje Mathisen <Terje.Mathisen@hda.hydro.com>
Newsgroups: comp.compilers,comp.arch
Date: 16 Feb 1996 01:26:39 -0500
Organization: Hydro
References: 96-02-165
Keywords: performance, experiment, architecture, comment

Hans Boehm wrote:
>
> An anecdote from a few days ago:
> [benchmarks on a SPARCstation 10 differed in a factor of 2 depending on
> where in the cache they landed]


A Dos box is actually very nice when you want to get repeatable
numbers, both because there is very nearly no background traffic,
except for the 18.2 Hz clock tick, and because it is easy to set up
the timing to start after the program is loaded, or load it from a ram
disk.


When timing som fp code for a Pentium vs PentiumPro comparison, I did
repeated sets of micro-measurements, using the RDTSC opcode to get the
cpu cycle counts for each piece of code.


Before the timing part, I did a variable (but controlled) amount of
cache flushing, by reading sequentially through a memory buffer, from
zero to 256K in size.


This way I could repeat each measurement 120 times, and get exactly
the same cycle count on more than 110 of them.


--
-Terje Mathisen (include std disclaimer) <Terje.Mathisen@hda.hydro.com>
[Doesn't help a SPARC much, but cycle counters might indeed be useful. -John]
--


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