Related articles |
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Register allocation for 8-bit processors? torbenm@diku.dk (1995-03-09) |
Register allocation for 8-bit processors? preston@tera.com (1995-03-14) |
Re: Register allocation for 8-bit processors? Rajiv@ibeam.jf.intel.com (1995-03-14) |
Newsgroups: | comp.compilers |
From: | preston@tera.com (Preston Briggs) |
Keywords: | registers, optimize, bibliography |
Organization: | Compilers Central |
References: | 95-03-057 |
Date: | Tue, 14 Mar 1995 00:52:05 GMT |
>I will shortly be starting work on a register allocator for 8-bit
>processors. I intend to use a variant of graph colouring. I have
>identified some problems and found some plausible solutions to these,
>but wonder if anyone knows of any papers that discuss the following
>problems:
>
> 1) Values larger than 8 bits (16 and 32 bits are needed in my case)
> ...
> 2) Most 8-bit processors are two-address, ...
A better solution for (1) is discussed in
title="Coloring Register Pairs",
author="Preston Briggs and Keith D. Cooper and Linda Torczon",
pages="3--13",
journal=loplas,
year=1992,
month=mar,
volume=1,
number=1
The same discussion also appears as a chapter of my thesis
(anonymous ftp from cs.rice.edu, in the directory public/preston)
A better solution for (2) is mentioned in my thesis (section 8.6,
under Uses of Coalescing: Handling Instruction Constraints), but only
because I'm describing Chaitin's work. See the section on register
allocation in
title="An Overview of the {PL.8} Compiler",
author="Marc A. Auslander and Martin E. Hopkins",
journal=sigplan,
year=1982,
month=jun,
volume=17,
number=6,
note=pldi82,
pages="22--31"
Preston Briggs
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