Re: SPARC code generation for compiler course

nickh@harlequin.co.uk (Nick Haines)
Thu, 16 Dec 1993 10:12:46 GMT

          From comp.compilers

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| List of all articles for this month |

Newsgroups: comp.compilers,comp.arch
From: nickh@harlequin.co.uk (Nick Haines)
Keywords: sparc, architecture
Organization: Harlequin Limited, Cambridge, England
References: 93-12-040 93-12-059
Date: Thu, 16 Dec 1993 10:12:46 GMT

markt@harlequin.co.uk (Mark Tillotson) writes:


      As I understand it g1/g2/g3/g4 and all the floating point registers
      are caller save, g5/g6/g7 are reserved for the `execution environment'
      or some such wording---does anyone know what this means? (they are of
      no use to the kernel in a multi-tasking environment because they are
      not supervisor-mode only).


"The current convention is that the global registers (except %g0) are
assumed to be volatile across procedure calls. The convention used by the
SPARC Application Binary Interface (ABI) is that %g1 is assumed to be
volatile across procedure calls, %g2 ... %g4 are reserved for use by the
application program (for example, as global register variables), and %g5
... %g7 are assumed to be nonvolatile and reserved for (as-yet-undefined)
use by the execution environment."


(SPARC architecture manual version 8).


SO clearly when not adhering to the ABI, g1-g7 are caller save (unless one
defines one's own convention, as compiler writers are free to do).


When adhering to the ABI, the meaning is not clear, and probably requires
reading the Sparc ABI definition. Any Sun experts out there want to
comment? My non-expert eye says that g1 is caller-save, g2-g4 are up to
the compiler writer (caller-save, or global variables, or some kind of
program state; this is what is meant by "the execution environment"
elsewhere in the manual) and g5-g7 are "reserved" to the ABI (although how
the ABI copes with non-conforming code is unstated).


Nick Haines
nickh@harlequin.co.uk
--


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