Related articles |
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Register Files storm@binkley.cs.mcgill.ca (1992-10-05) |
Re: Register Files preston@helena.cs.rice.edu (1992-10-05) |
Re: Register Files ssimmons@convex.com (1992-10-06) |
Re: Register Files cliffc@cs.rice.edu (1992-10-06) |
Re: Register Files hobbs@steven.enet.dec.com (1992-10-06) |
Re: Register Files kendall@centerline.com (1992-10-07) |
Re: Register Files bart@cs.uoregon.edu (1992-10-07) |
Re: Register Files henry@zoo.toronto.edu (1992-10-07) |
Re: Register Files ali@LARK.WARP.CS.CMU.EDU (Ali-Reza Adl-Tabatabai) (1992-10-22) |
Re: Register Files idacrd!desj@uunet.UU.NET (1992-10-23) |
Newsgroups: | comp.compilers |
From: | cliffc@cs.rice.edu (Cliff Click) |
Organization: | Compilers Central |
Date: | Tue, 6 Oct 1992 14:58:32 GMT |
Keywords: | registers, optimize |
References: | 92-10-013 |
>[why did DEC compiler writers care if Alpha has combined or separate
>integer and FP registers?]
Some quick problems for the compiler (and compiler writer):
1/2 as many integer or float registers (cannot conveniently put ints in
float registers and vice-versa). Causes more spilling and requires better
spill-code handling.
Must register-allocate both sets (perhaps two passes with the allocator).
Passing values between register sets often goes through memory. This
requires some memory space to be handy (i.e. some stack slots available
and a stack pointer defined). This is slow if not in cache, so you also
have to make sure the required cache line is not being booted out by other
references.
I don't think it has any big implications on scheduling.
Cliff
cliffc@cs.rice.edu
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