Register + Offset vs. Register Indirect

eifrig@beanworld.cs.jhu.edu (Jonathan Eifrig)
Sun, 7 Jun 1992 16:05:52 GMT

          From comp.compilers

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Re: Caller allocates space for callee-save registers henry@zoo.toronto.edu (1992-06-05)
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Re: Register + Offset vs. Register Indirect igor!davidm@uunet.UU.NET (1992-06-08)
Re: Register + Offset vs. Register Indirect db@dcs.ed.ac.uk (Dave Berry) (1992-06-09)
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Newsgroups: comp.compilers
From: eifrig@beanworld.cs.jhu.edu (Jonathan Eifrig)
Keywords: architecture, registers
Organization: The Johns Hopkins University CS Department
References: 92-05-123 92-06-031
Date: Sun, 7 Jun 1992 16:05:52 GMT

henry@zoo.toronto.edu (Henry Spencer) writes:


> [ On AMD 29k addressing modes: ]


>The price you pay, incidentally, for all those registers being easily
>addressable, is no offsets in memory addressing. The usual RISC
>addressing modes are register, short immediate, and memory at (register +
>short offset). On the 29000, it's register, short immediate, and memory
>at (register). You get no free address arithmetic, so the penalty for not
>exploiting the registers well is higher.


[ As an aside, Henry bemoans the fact that the 29k is marketed as an
embedded controller. I can tell you why that is: AMD market research
discovered that for every processor that is sold as a CPU for some system,
six are sold as embedded controllers for peripherals.]


[The following only applies to pipelined RISC architectures:]


Actually, the penalty isn't even _this_ severe. If the processor
has a single ALU with which it does both arithmetic operations and address
offset computations, using the (register + short offset) addressing mode
can cause a pipeline stall. Moveover, if the processor supports immediate
offsets, often register-addressing is implemented as a (register + short
offset) with an offset of zero; register addressing exists only at the
_assembly_ level. In practice, means pipeline stalls occur while
performing address calculations with a zero offset. (I believe the
SPARCitecture is like this ....)


The biggest advantage of the (register + short immediate)
addressing mode is that the _loading_ of the offset is essentially free.
Since (if my memory is serving me) something like half of all memory
references (of compiled C programs) use the (stack-pointer + offset)
addressing mode, the advantage of the free load usually offsets the
penalty of the possible pipeline stall.
--


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