Re: Register Allocation and Aliasing

pur-ee!hankd@dynamo.ecn.purdue.edu (Hank Dietz)
Sat, 14 Jul 90 22:43:39 GMT

          From comp.compilers

Related articles
Register Allocation and Aliasing aglew@oberon.crhc.uiuc.edu (1990-07-05)
Re: Register Allocation and Aliasing rfg@ncd.com (1990-07-06)
Re: Register Allocation and Aliasing preston@rice.edu (Preston Briggs) (1990-07-14)
Re: Register Allocation and Aliasing pur-ee!hankd@dynamo.ecn.purdue.edu (1990-07-14)
Re: Register Allocation and Aliasing torbenm@diku.dk (1990-07-14)
Re: Register Allocation and Aliasing mike@vlsivie.at (1990-07-15)
Re: Register Allocation and Aliasing aglew@dwarfs.crhc.uiuc.edu (1990-07-16)
Re: Register Allocation and Aliasing phorgan@cup.portal.com (Patrick Horgan) (1990-07-17)
Re: Register Allocation and Aliasing heggy@cs.pitt.edu (1990-07-17)
Re: Register Allocation and Aliasing aglew@oberon.crhc.uiuc.edu (1990-07-17)
[3 later articles]
| List of all articles for this month |

Newsgroups: comp.arch,comp.compilers
From: pur-ee!hankd@dynamo.ecn.purdue.edu (Hank Dietz)
Summary: It's been done -- they're called CRegs
Keywords: optimize, analysis
Organization: Purdue University Engineering Computer Network
References: <1990Jul05.155937.13214@esegue.segue.boston.ma.us>
Date: Sat, 14 Jul 90 22:43:39 GMT

In article <1990Jul05.155937.13214@esegue.segue.boston.ma.us> aglew@oberon.crhc.uiuc.edu (Andy Glew) writes:
>How often are quantities that *might* be allocated to registers *not*
>allocated to registers, because of the remote *possibility* of
>aliasing via some circuitous pointers?
>
> Hare brained idea: allocate quantities that *might* be aliased to
>registers anyway. Provide a register to contain the true memory
>address of the aliased quantity, which causes a trap when the address
>is accessed (or automagically forwards to/from the register).


If you look back in the IEEE proceedings from Supercomputing '88, you'll see
a paper that I and Chi-Hung Chi did addressing exactly this issue (the title
is something Like "CRegs: A New Type of Memory for Accessing Arrays and
Pointers"). The CReg mechanism augments registers with address fields which
are used associatively to keep the register contents coherent... we also
pointed-out that with proper compiler analysis, the associativity could be
limited to a rather small set size without ill effect (e.g., a set size of 4
rather than fully associative -- this keeps the speed of CRegs competitive
with that of ordinary registers).


>Evaluation framework:
...
>Unfortunately, I don't have any idea of what the parameters are like.


Some preliminary results on CRegs appear in the aforementioned paper.
The results were pretty good. However, some of the most significant
benefits are not the obvious ones. E.g., you don't need to do
explicit stores as often (ever?) -- you can even use a dirty bit and a
lazy store mechanism. Likewise, you don't need as many loads, and you
certainly don't need to fetch as many addresses, which reduces the
INSTRUCTION FETCH bandwidth required.


-hankd@ecn.purdue.edu


PS: Chi and I had actually tried to get this stuff patented back in
        1987, and it looked like we had some very nice claims, but Purdue
        University basically put it on hold until it had been over a year
        since public disclosure... oh well.


PPS: We've also looked at using CRegs for instructions (vs. data).
--


Post a followup to this message

Return to the comp.compilers page.
Search the comp.compilers archives again.