Compiler positions available for week ending June 8

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From: "comp.compilers" <>
Newsgroups: comp.compilers
Date: 8 Jun 2014 10:14:38 -0000
Organization: Compilers Central
Keywords: jobs
Posted-Date: 08 Jun 2014 06:41:31 EDT

This is a digest of ``help wanted'' and ``position available'' messages
received at comp.compilers during the preceding week. Messages must
advertise a position having something to do with compilers and must also
conform to the guidelines periodically posted in
Positions that remain open may be re-advertised once a month. To respond
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Date: Fri, 6 Jun 2014 11:27:56 +0100
From: Bjorn Franke <>
Subject: Compiler positions: Two Industrial CASE (iCASE) Studentships Available
MIME-Version: 1.0

Two Industrial CASE (iCASE) Studentships Available

The Institute for Computing Systems Architecture (ICSA) within the School of
Informatics at the University of Edinburgh and ARM Ltd., Cambridge, are
offering two industrial CASE studentships in following areas:

1. Profile-directed parallelisation of sequential legacy applications
2. High-speed simulation of mobile GPUs

Project Descriptions

1. Profile-directed parallelisation of sequential legacy applicationsb(
The aim of this applied research is to investigate how to improve
parallelisation of sequential legacy applications using combined static and
dynamic analyses and parallel patterns (also known as algorithmic skeletons).
Existing parallelising compilers are built on the same, fundamentally flawed
principle: Reliance on static analysis and focus on a single type of
parallelism only. Potentially data-parallel loops are identified in the code,
before a mathematical model of parallelism-inhibiting dependencies is created
and solved, and finally parallel code is generated for those loops which can
be statically proven to be parallel. Unfortunately, this does not work in
practice and state-of-the-art auto-parallelisers fail to detect parallelism
or, even worse, result in performance degradation. In a nutshell, we propose
to take a radically new approach to parallelisation, where we (a) exploit
well-known parallel patterns rather than only data-parallel loops, exposing
all levels and shapes of parallelism, and (b) use additional dynamic
information rather than continuing to incrementally improve approximation
solutions to the provenly undecidable problem of static dependence analysis.
Rather than taking a compiler concept (dependencies) and trying to fit this to
the problem of parallelism detection, we start off with parallel patterns used
routinely by expert parallel programmers, express them in terms understood by
a compiler and incorporate additional dynamic information, which is
fundamentally unavailable to any static analysis.

2. High-speed simulation of mobile GPUsb(
The GPU (Graphics Processing Unit) is a specialised circuit designed to
accelerate the image output in a frame buffer intended for output to a
display. GPUs are very efficient at manipulating computer graphics and are
generally more effective than general-purpose CPUs for algorithms where
processing of large blocks of data is done in parallel. Modern smartphones are
equipped with advanced embedded chipsets that can do many different tasks
depending on their programming. GPUs are an essential part of those chipsets
and as mobile games are pushing the boundaries of their capabilities, the GPU
performance is becoming increasingly important. In this project we will
explore fast, yet accurate simulation methodologies for mobile GPUs, enabling
hardware designer to explore design options for future generation GPUs and
software developers to optimise their code for mobile GPUs in a controlled
simulation environment.

Candidate Profile
We are looking for candidates to apply with a background in computer
science/engineering, or related disciplines, ideally with strong theoretical
foundations and excellent practical skills in compilers, parallel programming,
C/C++/assembly programming and computer architecture. Candidates should have
or expected to achieve a degree (2:1 or above). Masters students or those with
practical experience in research or industry are also encouraged to apply. The
successful candidate will benefit from both academic and industrial training,
have the opportunity to choose within scope study topics and gain a real
working experience in a world leading processor design centre at ARM Ltd.,

Student eligibility requirements for EPSRC Industrial CASE funding are:
1. A relevant connection with the UK, usually established by residence, and
2. an upper second class honours degree, or a combination of qualifications
and/or experience equivalent to that level.
EU students may be eligible for a fees-only award (no maintenance grant). Note
that the nominated candidate is subject to approval by EPSRC and ARM Ltd.B

This Studentship will cover tuition fees at the UK/EU rate and provide a
tax-free stipend at the EPSRC rate. Students receive funding for a full EPSRC
studentship for 3.5 years (currently ~B#68,648).

Research Partner: Institute for Computing Systems Architecture (ICSA)
The Institute for Computing Systems Architecture (ICSA) is one of seven
research institutes in the School of Informatics at the University of
Edinburgh. It was founded in 1998, following the creation of Informatics. ICSA
is primarily concerned with the architecture and engineering of future
computing systems. Within its five research groups, ICSA covers topics which
include: performance and scalability, innovative algorithms, architectures,
compilers, languages, and protocols.
Research Assessment Exercises (RAE) results have confirmed Edinburgh's
position as the largest and best Informatics research centre in the UK. In the
UK, the higher education funding bodies carry out a Research Assessment
Exercise (RAE) to enable them to distribute public funds for research,
selectively, on the basis of quality. Edinburgh came top for Computing Science
and Informatics in the UK in the last two RAEs, 2001 and 2008.
Informatics at Edinburgh delivers more world-leading (4*) research than anyone
else in the UK- 69% more than our nearest competitor.
- We contribute 10% of the UK's world-leading research in the Computer Science
and Informatics Unit of Assessment (UoA).
- We deliver more internationally-excellent (3*) or world-leading (4*)
research than anyone else - 44% more than our nearest competitor. Edinburgh
contributes more research that is at least internationally excellent than
- Overall, ours is the largest research grouping in the UK - again, 44% larger
than our nearest competitor.
- All of our research is internationally recognised, or better (2*, 3* or 4*)
- and we submitted every eligible member of staff.

Industrial Partner: ARM Ltd.
ARM Holdings is the world's leading semiconductor intellectual property (IP)
supplier and as such is at the heart of the development of digital electronic
products. Headquartered in Cambridge, UK, and employing over 2,000 people, ARM
has offices around the world, including design centres in Taiwan, France,
India, Sweden, and the US.
The ARM business model involves the designing and licensing of IP rather than
the manufacturing and selling of actual semiconductor chips. ARM licenses IP
to a network of Partners, which includes the world's leading semiconductor and
systems companies. These Partners utilise ARM IP designs to create and
manufacture system-on-chip designs, paying ARM a license fee for the original
IP and a royalty on every chip or wafer produced. In addition to processor IP,
ARM provides a range of tools, physical and systems IP to enable optimised
system-on-chip designs.
With the diversity of ARM IP B and the broad B ecosystem of supporting silicon
and software for ARM-based solutions, the world's leading Original Equipment
Manufacturers (OEMs) use ARM technology in a wide variety of applications
ranging from mobile handsets and digital set top boxes to car braking systems
and network routers. Today ARM technology is in use in 95% of smart phones,
80% of digital cameras, and 35% of all electronic devices.

Applicants are encouraged to contact Dr BjC6rn Franke (
or Prof Michael ObBoyle ( for further information and an
initial discussion.

BjC6rn Franke

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