Re: New datatype addition to gcc

Sriharsha <sriharsha.v@redpinesignals.com> writes:


> My h/w personnel says that there will be TWO RAMs in the processor,
> one is 8-bit addressible while the other is 16-bit addressible. If
> the compiler has to do 8-bit data load/store, it uses the 8-bit RAM
> and if it has something to do with 16-bit, it uses that RAM. This
> sounded bizzare to me but, thats what they say (or atleast I've
> never come across such stuff).


My sympathies, that sounds like it is going to be a very tough slog.
I think we have a new entrant in the category "Hardware designers who
make it difficult or impossible to write a decent compiler for their
machine, and then wonder why nobody is using it".


I did a google search on "GCC multiple memory space" and found the
following article by Svein E. Seldal. You might want to read the
thread, and contact Svein directly, because it looks like you have
similar interests.


My take is you can't expect an ISO standard C implementation on such a
machine using two address spaces, one for byte accesses and one for
word, since structures can contain both types, and structures are
required to have all members adjacent. I suspect the best you can do
is use just one address space, and issue multiple instructions,
possibly adding a sop with attributes to declare static variables in
the other address space. Note, once a pointer has been taken, GCC
historically has lost all of the attribute information.
--
Michael Meissner
email: mrmnews@the-meissners.org
http://www.the-meissners.org

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