Re: How about VLIW used as RISC?

MitchAlsup@aol.com (Mitch Alsup)
29 Apr 2004 12:10:10 -0400

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From: MitchAlsup@aol.com (Mitch Alsup)
Newsgroups: comp.arch,comp.compilers
Date: 29 Apr 2004 12:10:10 -0400
Organization: http://groups.google.com
References: 04-04-088
Keywords: architecture
Posted-Date: 29 Apr 2004 12:10:10 EDT

ronald@interqos.com (Ron) wrote in message news:04-04-088...
> We have simple scalar RISC and superscalar RISC but why there is few
> or no VLIW used as an RISC for general application? There is criticism
> about code density. However, as many has pointed out, modern VLIW has
> already used compression to remove NOOP instruction in the instruction
> packet. I guess 40-bit instruction is enough hold the additional
> control information, such as predicate bits, p bits(for indicating the
> last instruction of the instruction packet).
>
> So what is your opinion?


With the advent of machines like Pentium 4 (trace cache et al.) even
the x86 architecture has the ability to convert x86 instructions into
a VLIW form. So the name 'VLIW' is only 'another' technique in the
large grab bag of tricks the x86 architect can use (if they find that
the performance outweights the costs).


Mitch


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