Related articles |
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x86 global floating point register allocation sverker.is@home.se (Sverker Nilsson) (2002-08-24) |
Re: x86 global floating point register allocation jacob@jacob.remcomp.fr (jacob navia) (2002-09-03) |
Re: x86 global floating point register allocation jgd@cix.co.uk (John Dallman) (2002-09-03) |
Re: x86 global floating point register allocation reig@tenerife.ics.uci.edu (Fermin Reig) (2002-09-03) |
Re: x86 global floating point register allocation ceco@jupiter.com (Tzvetan Mikov) (2002-09-08) |
From: | "Fermin Reig" <reig@tenerife.ics.uci.edu> |
Newsgroups: | comp.compilers |
Date: | 3 Sep 2002 00:12:48 -0400 |
Organization: | University of California, Irvine |
References: | 02-08-087 |
Keywords: | arithmetic, 386 |
Posted-Date: | 03 Sep 2002 00:12:48 EDT |
"Sverker Nilsson" <sverker.is@home.se> writes:
> I am a writing a compiler, targeting the (Intel IA-32 etc.) x86
> cpu(*). I would like to ask if someone can comment on how to handle
> floating point registers that are live across basic blocks, and
> possibly help me with references to existing work and standard
> terminology. (I am going to try to get it approved for my master's
> thesis and likely publish the code as open source.)
> [...]
Allen Leung and Lal George wrote a note on how the SML/NJ compiler
handles FP registers in the x86. You can find it here:
http://cm.bell-labs.com/cm/cs/what/smlnj/compiler-notes/
I hope that helps.
Fermin Reig
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