Re: variable length instructions, was Chicken or the Egg?

"David Thompson" <david.thompson1@worldnet.att.net>
19 Oct 2000 14:36:11 -0400

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Re: variable length instructions, was Chicken or the Egg? david.thompson1@worldnet.att.net (David Thompson) (2000-10-19)
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From: "David Thompson" <david.thompson1@worldnet.att.net>
Newsgroups: comp.compilers
Date: 19 Oct 2000 14:36:11 -0400
Organization: AT&T Worldnet
References: 00-10-097 00-10-115
Keywords: linker, optimize

VBDis <vbdis@aol.com> wrote:
[ unstable short/long offsets ]
> [As I think we've said three times now, this is certainly possible in
> theory. I'd still like to hear whether it occurs in practice often
> enough to matter. -John]


Waaaay back when I worked on assembler for the PDP-8, which has a
similar issue, they *seemed* quite frequent, but I think that was an
illusion caused by the extra work and attention that the borderline
cases required, while the (vast) majority of cases were "obviously"
near or far without much thought. And on a machine with only 4KW
total, saving even a dozen words could be significant.


For anyone who doesn't know it and is interested:
(anyone still reading? <G>)


The -8 memory-reference instructions, including JMP and JMS, could
only address the same 128-word page as the instruction or the 128-word
page starting at address zero (i.e. "fast" data); anything else
required indirecting through a pointer in one of those two pages,
hence _usually_ two words instead of one; sometimes you could arrange
for multiple references to share one pointer, or to be really hackish,
to reuse a data value (or cell) as a pointer. (And there were no
conditional jumps at all; only conditional skip over a jump.)
--
- David.Thompson 1 now at worldnet.att.net
[I learned to program on a PDP-8, and one of the trickier and more
interesting parts of the job was shuffling routines around to pack them
into pages most effectively. -John]











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